1. Field of the Invention
The present invention relates to pulse generators and more particularly to multiphase resonant pulse generators.
2. General Background and State of the Art
Many applications in electronics require a driving signal consisting of a series of pulses. Such applications exist in the fields of digital, analog, electromechanical and power electronics, among others.
Many of these applications present a load having significant capacitive reactance. In turn, this is a source of significant power dissipation.
Many applications require low power dissipation. One example is portable computers. As is well known, portable computers run on batteries. The length of time the portable computer can run on a single charge is often a very important specification.
Mathematically, the power P dissipated by a system having a capacitance C and being cycled through a voltage V at a frequency F is:P=D×F×CV2
where D is the dissipation factor and reflects the energy efficiency of the circuit. For non-resonant systems, D is usually equal to 1 or higher. In resonant systems, the value of D can be reduced to substantially less than one.
One of the simplest ways to generate cyclic signals which have small dissipation factors is with a tuned circuit, such as an LC-tank. This type of circuit supplies a sinusoidal current and voltage waveform to the capacitive load.
Although LC-tank circuits are straightforward to operate with high efficiency, they are generally unsuitable for powering capacitive loads with “digital” properties. Typically, these applications require a multiplicity of pulse signals in the form of repetitive pulse trains with little or no overlap between pulses and with sizable “off” intervals during which individual pulse signals remain at near-zero levels. The most well-known of these timing methodologies for digital VLSI circuits is two-phase, non-overlapping clocking. See L. A. Glasser, D. W. Dobberpuhl, “The Design and Analysis of VLSI Circuits,” Addison-Wesley, Reading, 1985. Other examples include:
1. the row and column select lines of an LCD matrix;
2. micro-electromechanical devices;
3. on-chip gate and parasitic capacitance of a MOS VLSI chip;
4. off-chip capacitive loads (e.g., I/O pads) of a MOS VLSI chip;
5. bootstrapped circuits; see R. E. Joynson, J. L. Mundy, J. F. Burgess, C. Neugebauer, . . . “Eliminating Threshold Losses in MOS Circuits by Boot-Strapping Using Varactor Coupling,” IEEE Jnl of Solid-State Circuits, SC-7, No. 3, June 1972; C. L. Seitz, A. H. Frey, S. Mattisson, S. D. Rabin, D. A. Speck, J. L. A. van de Snepscheut, “Hot-Clock nMOS,” Proc. of the 1985 Chapel-Hill Conf on VLSI, . April 1985; L. A. Glasser, D. W. Dobberpuhl, “The Design and Analysis of VLSI Circuits,” Addison-Wesley, Reading, 1995; N. Tzartzanis, W. C. Athas, “Design and Analysis of a Low Power Energy-Recovery Adder,” Fifth Great Lakes Symposium on VLSI, March 1995; and W. C. Athas, “Energy-Recovery CMOS,” (Massoud Pedram, editor) Kluwer Academic Publishers, 1995;
6. energy-recovery CMOS circuits; see N. Tzartzanis, W. C. Athas, “Design and Analysis of a Low Power Energy-Recovery Adder,” Fifth Great Lakes Symposium on VLSI, March 1995; W. C. Athas, “Energy-Recovery CMOS,” (Massoud Pedram, editor) Kluwer Academic Publishers, 1995 and S. G. Younis, “Asymptotically Zero Energy Computing Using Split-Level Charge Recovery Logic,” Ph.D. thesis, Massachusetts Institute of Technology, June 1994; and
7. adiabatic CMOS circuits; see W. C. Athas, L. Svensson, J. G. Koller, N. Tzartzanis, E. Y.-C. Chou, “Low-Power Digital Systems Based on Adiabatic-Switching Principles,” IEEE Trans. on VLSI System, Vol 2, No. 4, December 1994 and J. S. Denker, “A Review of Adiabatic Computing,” 1994 IEEE Symposium on Low Power Electronics, October 1994.
An LC-tank circuit with a split capacitive load provides two-phase symmetrical sinusoidal signals 180 degrees out of phase. However, the signals are often not useful for clocking purposes because of the significant overlap between the phases and the almost-zero off interval.
Thus, there continues to be a very substantial need for pulse generation systems which can drive loads having significant capacitive reactance with a minimum of power dissipation.